In the past electrical devices such as semiconductor die have often been packaged by first mounting the device on a leadframe and then making connections to external leads, and then encapsulated. However, as miniaturization of electrical devices has advanced, new packaging techniques have been developed, and are still being developed, for shrinking the packaged semiconductor device or devices by such methods as putting multiple die in a package, and using solder bump interconnects with thin mold coverings.
Although solder bumps and thin molding provide a small package, the semiconductor die is fragile and generally must be packaged with enough rigidity to protect the die and seal the die. Another constraint is that packaging methods, to be economically feasible for the commercial market, need to be versatile so that it can be used with different device sizes and geometries and still provide a package with foot prints which match de facto standards in the industry.